As a Layout Design Engineer, you will create custom layout designs for analog blocks, complex digital and mixed-signal blocks, standard cell libraries, and memory compilers. The role involves physical array planning, layout optimization, and verification to ensure compliance with design and reliability standards.
You will contribute to advanced silicon design and development initiatives while collaborating with cross-functional engineering teams to deliver efficient and high-quality layout solutions.
This position follows Intel's hybrid work model, allowing employees to work both on-site and off-site based on business requirements.
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Intel Corporation is a globally recognized leader in semiconductor manufacturing and technology innovation. Founded in 1968 and headquartered in Santa Clara, California, Intel designs and produces advanced microprocessors, chipsets, and integrated solutions that power a vast range of computing devices—from personal computers and servers to cloud infrastructure and emerging AI applications. With over 100,000 employees worldwide, Intel's mission is to create world-changing technology that enriches the lives of every person on Earth.
Intel holds a dominant position in the global semiconductor industry, known for its pioneering work in x86 architecture and continuous advancements in process technology. The company has recently focused on expanding its manufacturing capacity through initiatives like the IDM 2.0 strategy, investing heavily in new fabrication plants in the United States and Europe to strengthen supply chain resilience. In 2023, Intel announced significant progress in AI-optimized chips and next-generation processors, underscoring its commitment to innovation and competitiveness in a rapidly evolving tech landscape.
Websiteintel.com
