Intel Bangalore Hiring Analog Circuit Design Engineer

Job Description

The role involves contributing to High IP (HIP) development by supporting analog circuit design activities. Responsibilities include deriving micro-architectural specifications from high-level architecture and converting them into circuit designs and custom layouts. The engineer will run design tools to validate and qualify HIP blocks for delivery standards.

Work also includes generating timing collateral, managing waivers, and supporting multiple SoC programs that deploy and utilize the Soft IP. Knowledge of functional bus protocols and IEEE testing standards such as JTAG is beneficial. Internship experience with a leading VLSI company is considered an advantage.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline, or equivalent experience depending on business needs.
• 0–1+ years of experience in analog circuit design with a Bachelor's degree, or no experience required with a Master's degree.
• Hands-on knowledge of analog circuit design including TX/RX blocks, power circuits, and behavioral modeling.
• Understanding of analog floorplanning and layout design concepts.
• Experience with analog validation, debugging, and system-level modeling.
• Familiarity with circuit design libraries and related development tools.

Preferred Qualifications

• Ability to collaborate effectively with multidisciplinary engineering teams.
• Strong problem-solving ability with attention to detail when optimizing designs for performance and efficiency.
• Capability to communicate design progress and technical challenges clearly.
• Interest in innovation and tackling complex technical problems.

Business Group

The Central Engineering Group (CEG) builds scalable engineering solutions across three key areas: product enablement including IP, tools and methodologies; custom ASIC solutions built using existing IP; and foundry enablement supporting major customers and technology validation. The organization focuses on customer-driven, end-to-end engineering solutions with rapid development cycles.

Work Model

This position follows Intel's hybrid work model, allowing employees to divide their time between on-site work at the assigned Intel location and off-site work.