Synopsys Hiring Digital Verification Apprentice (Hyderabad) | Freshers 2025/2026

We Are

We drive technology innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, where smart tech and AI are seamlessly integrated into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world.

Apprenticeship Experience

At Synopsys, apprentices work on real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide, and having fun in the process. You'll have the freedom to share ideas, unleash creativity, and explore your interests. This is your opportunity to bring solutions to life and work with cutting-edge technology that shapes both the future of innovation and your own career path. Join us and start shaping your future today.

Mission Statement

Our mission is to fuel today's innovations and spark tomorrow's creativity. Together, we embrace a growth mindset, empower one another, and collaborate to achieve shared goals. Every day, we live by our values of Integrity, Excellence, Leadership, and Passion, fostering an inclusive culture where everyone can thrive, both at work and beyond.

What You'll Be Doing

• Develop verification environments: Create and maintain comprehensive verification environments for digital design blocks and systems using industry-standard methodologies.
• Design and execute testbenches: Write sophisticated testbenches using Verilog and SystemVerilog, applying UVM methodology to build reusable and scalable verification components.
• Collaborate across teams: Work with design and architecture teams to develop test plans, functional coverage models, and resolve technical challenges.
• Debug and analyze: Analyze simulation results, debug failures, and identify design or verification issues while implementing SystemVerilog Assertions (SVA) to verify design behavior and protocol compliance.
• Drive verification closure: Contribute to regression execution, coverage analysis, and documentation of verification plans and results.

What You'll Need

• Completed B.E/B.Tech in Electronics and Communication Engineering or a related field (Mandatory).
• Fresh graduates from the class of 2026 or 2025.
• Not currently enrolled or completed any M.Tech programs or postgraduate diplomas.
• Not employed in any full-time positions at any company (limited internship experience is acceptable).
• Strong knowledge of Verilog and SystemVerilog programming languages.
• Familiarity with UVM-based verification methodology and its practical applications.
• Solid understanding of digital design and digital verification concepts and flows.
• Ability to write and debug SystemVerilog Assertions (SVA).
• Excellent analytical, debugging, and problem-solving skills.
• Preferred: Awareness of MIPI protocols (UniPro and M-PHY), exposure to simulation tools, regression environments, code coverage, and functional coverage analysis.

Key Program Facts

• Program Length: 12 months Apprenticeship Program
• Location: Hyderabad, India
• Working Model: In office
• Full-Time/Part-Time: Full-time
• Start Date: September/October 2026

Equal Opportunity Statement

Synopsys is committed to creating an inclusive workplace and is an equal opportunity employer. We welcome all qualified applicants to apply, regardless of age, color, family or medical leave, gender identity or expression, marital status, disability, race and ethnicity, religion, sexual orientation, or any other characteristic protected by local laws. If you need assistance or a reasonable accommodation during the application process, please reach out to us.